• 0 Posts
  • 7 Comments
Joined 3 years ago
cake
Cake day: March 23rd, 2022

help-circle
  • Neoliberals will do anything to downplay or outright deny any historical incident where import substitution lead to industrialization. Creating captive markets for the dumping of manufactured products was one of the prime drivers of colonialism, which continued under neocolonialism. With sanctions, the US is unintentionally undermining their own hegemony. Businesses like having access to markets and moats. They are giving moats to one side and stripping access to the other.

    Sanctions will do for Chinese chip makers what the great firewall did for Chinese internet giants.

    Seeing /u/dylan522p acknowledge reality somewhat is refreshing although the conclusion is the predictable “Washington is just sanctioning wrong, if they followed my foolproof sanction regime it would magically work”. Liberals attacking him for this article is quite hilarious. They’re really intolerant of even the slightest deviation from US state department rhetoric.


  • Yes, there will be progress but that’s not really what Moore’s Law is about. Moore’s Law is not an observation that there will be progress eventually but an observation at specific rate of that progress. It’s not “transistors will double eventually”, or “transistors will increase somewhat every 2 years”.

    With exponential growth, the tiniest decrease compounds to a major difference. 2 to the power of 3 is 8; the A16 has 16B transistors not 26B. That’s with the gains of the last DUV nodes, 16->10->7nm. EUV to EUV, 5nm to 3nm doesn’t match up to that. It seems transistor growth with EUV nodes is becoming linear so not really in line with the exponential growth of Moore’s Law.

    The chips could be larger but flagship phones would have to become even more expensive, and physically larger to dissipate the extra heat. Dennard Scaling mattered more in practice than Moore’s Law ever did but that ended over a decade ago. At the end of the day, all the microarchitecture and foundry advances are there to deliver better performance for every succeeding generation and the rate of that is definitely decelerating.

    In 3 years, the only Android chip that has a perceivable difference in performance from the Kirin 9000 is the 8 Gen 2, which cost $160 just for the chip. That performance difference isn’t even enough to be a selling point; the Mate 60 Pro is in the same price range as those 8 Gen 2 phones yet is still perfectly competitive in that market segment.


  • Well look at the other contract fabs that could buy EUV scanners if they wanted to.

    GlobalFoundries gave up on 7nm so 14/12nm is the best they have. UMC barely makes any 14nm chips so they definitely aren’t pursuing anything below 7nm. Getting to 7nm is an investment few can make and it won’t pay off for most. The number of fabless chip companies that can afford to design for <7nm and need the leading edge in performance is tiny. A high price of entry to serve so few customers.

    SMIC is only the third pure play contract fab to offer <=7nm and Samsung needed EUV to get to 7nm unlike SMIC and TSMC.

    Judging by the performance and density of the Kirin 9000S, SMIC’s 7nm DUV is at least as good as Samsung’s 5nm EUV. The same A510 cores made with SMIC’s 7nm are as efficient if not more so than those made with Samsung 4nm.

    The previous top Huawei phone, the P60 Pro has the 4G variant of the 8+ Gen 1, which was made with TSMC 4nm. The Mate 60 Pro being technically a downgrade in process node is something few if any of its users will actually notice in practice. Huawei could’ve easily just made a 5G modem and paired it with an 8 Gen 2. It would’ve been a lot easier to make a tiny modem yield but they chose the harder option of making an entire SOC. They succeeded in matching if not surpassing the TSMC 5nm made original that stopped being made on September 15, 2020. All the sanctions could do was delay further production of the Kirin 9000 for 3 years.


  • Transistor density isn’t doubling every 2 years.

    N3E is only 1.6x denser than N5 and that only apply to logic transistors. TSMC assumes logic makes up 50% of a hypothetical chip to arrive at 1.3x scaling. It wouldn’t come anywhere near close to actually doubling in real chips.

    Analog and SRAM scaling has been decelerating for years. TSMC N3E has the same SRAM cell size as N5. Samsung 4nm has the same SRAM cell size as 7nm. Because they don’t scale with logic, every succeeding generation these components will take up more and more of the silicon hence AMD’s move to chiplets.